1. Field of the Invention
The present invention relates to a method for improving image quality and a device used the same; particularly, relates to a method for improving the image quality of MSHD (Multi-Switch Half source Driving) display panel and a device used the same.
2. Description of Related Art
FIG. 1 is a circuit block diagram of a conventional liquid crystal display. This conventional liquid crystal display includes a gate driver 101, a polarity-dot-inversion source driver 102, and a conventional liquid crystal display panel 103. The gate driver 101 includes a plurality of integrated circuits GD1˜GDn which are used to turn on and turn off a thin film transistor. The source driver 102 includes a plurality of integrated circuits SD1˜SDM which are used to output data to a liquid crystal capacitor and supply a voltage to the capacitor when the thin film transistor is turned on. Each source line outputs only one pixel data during each horizontal line period. Such conventional liquid crystal panel is called single pixel driving LCD panel. FIG. 2 is a circuit diagram of a conventional LCD panel 103. Take an example of one pixel in FIG. 2. When the thin film transistor T1 is turned on by the gate line G0, the source line Sn outputs data to the liquid crystal capacitor C1.
FIG. 3 is a distribution diagram showing the parts of the pixel of the conventional LCD panel 103. The R, G, and B indicate red color, green color and blue color respectively. For example, (1,1) (2,1) (3,1) (4,1) (1,4) (2,4) (3,4) (4,4) are red pixels.
The data write-in steps for those pixels are as follows. Firstly, the gate line G0 turns on the thin film transistor of (1,1)˜(1,6) pixels and the sources line S1˜S6 output data simultaneously. Next, the gate line G1 turns on the thin film transistor of (2,1)˜(2,6) pixels and the source lines S1˜S6 output data simultaneously. The gate lines G2, G3, . . . etc. are in a similar way. In order to prevent the liquid crystal from polarizing, it is necessary to use a polarity inversion driver for the liquid crystal molecular. FIG. 4A˜FIG. 4E are the distribution diagrams respectively showing the type of the polarity of the parts of the pixels in FIG. 3.
Symbol + represents that the data voltage supplied to the pixel is larger than the common voltage Vcom where the data voltage with respect to the common voltage Vcom is positive. Symbol − represents that the data voltage supplied to the pixel is smaller than the common voltage Vcom where the data voltage with respect to the common voltage Vcom is negative. Referring to FIG. 3, 4A˜4D are distribution diagrams respectively showing the polarity of frame inversion, column inversion, line inversion and dot inversion. FIG. 4E is a diagram showing polarity of 2-dot inversion which can solve, for example, the situation of the frame flickering when turn off the operating system, e.g. MICROSOFT WINDOWS. In general, each source line of the conventional liquid crystal display outputs only one pixel data during each horizontal line period. The driving polarity of the pixels is mostly dot inversion thereof. Since the image quality is better than other driving polarity.
In order to decrease the number of the source drivers and source lines of the conventional liquid crystal display, FIG. 5 shows a circuit diagram of a MSHD display panel. The characteristic is that each source line outputs two pixels data during each horizontal line period, so the number of the source drivers and source lines of the panel module are half decreased. The dotted line means the parts of source line decreased; meanwhile, the conventional driver IC can still be used for source and gate driver circuit without redesign to achieve lowering the cost. Further, the difference of the designed timing controller between a MSHD display and the conventional LCD thereof is a memory control circuit and a signal generator controlled by the gate driver. Using a source line buffer controller to rearrange the pixels data in a buffer area so as to reach multiplexing purpose. Furthermore, the signal generator controlled by the gate driver generates a proper controlled signal to turn on the thin film transistor of assigned pixel to complete the write-in process. For example, when the gate line G2 turns on the thin film transistor T2, the source line Sn outputs data to the liquid crystal capacitor C2. Further, when the gate lines G1 and G2 turn on the thin film transistors T2 and T3 simultaneously, the source line Sn outputs data to the liquid crystal capacitor C3.
FIG. 6A is a distribution diagram showing the parts of the pixel of the MSHD display panel in FIG. 5. As the numbers of the source driver and source lines are half decreased; therefore, the data write-in steps of MSHD display panel is different from the single pixel driving LCD panel. The data write-in steps are as follows. Firstly, gate lines G0, G1 turn on the thin film transistors of (1,2) (1,4) (1,6) pixels and the source lines S1˜S3 output data simultaneously. Secondly, gate lines G1, G2 turn on the thin film transistors of (2,2) (2,4) (2,6) and the source lines S1˜S3 output data simultaneously. After that, gate line G1 turns on the thin film transistor of (1,1) (1,3) (1,5) and the sources line S1˜S3 output data simultaneously. Next, gate lines G2, G3 turn on the thin film transistors of (3,2) (3,4) (3,6) and the source lines S1˜S3 output data simultaneously. Then, gate line G2 turns on the thin film transistor of (2,1) (2,3) (2,5) and the source lines S1˜S3 output data simultaneously. The others are all in the same way. FIG. 6B is a diagram showing the parts of the pixel write-in order of the MSHD display panel as shown in FIG. 5. The write-in order of MSHD display panel is different from the single pixel driving LCD panel which makes the driving polarity of MSHD display panel does not belong to any types of FIG. 4A-4E. Turn on the panel as a whole, it is not entirely the dot inversion. Except the difference of the data write-in order, the source driver used on the conventional liquid crystal display is dot inversion; namely, the polarity of the neighboring output is opposite at the same timing.
FIG. 7 is a circuit block diagram showing the dot inversion source driver integrated circuit. Such as at the same timing, source lines S1, S3, Sn-3, Sn-1 output the positive polarity while S2, S4, Sn-2 and Sn output the negative polarity. To further cooperate with the data write-in steps of the MSHD display panel, refer to FIG. 6A, the steps are as follows. Firstly, gate lines G0, G1 turn on the thin film transistor of (1,2) (1,4) (1,6) pixels and the source lines S1˜S3 output data simultaneously wherein (1,2) (1,6) are positive and (1,4) is negative. Secondly, gate lines G1, G2 turn on the thin film transistor of (2,2) (2,4) (2,6) and the source lines S1˜S3 output data simultaneously wherein (2,4) is positive and (2,2) (2,6) are negative. Next, gate line G1 turns on the thin film transistor of (1,1) (1,3) (1,5) and the source lines S1˜S3 output data simultaneously wherein (1,3) is positive and (1,1) (1,5) are negative. Then, gate lines G2, G3 turns on the thin film transistor of (3,2) (3,4) (3,6) and the source lines S1˜S3 output data simultaneously where in (3,2) (3,6) are positive and (3,4) is negative. FIG. 8 is a distribution diagram showing parts of the pixel polarity of MSHD display panel with the dot inversion source driver which is a 1+2 dot inversion driving polarity in horizontal direction. FIG. 9A˜9C are distribution diagrams showing parts of the pixel polarity displayed in single color as shown in FIG. 8. In FIG. 9A and 9B, when the frame displays red or blue, the driving polarity of the panel is horizontal line inversion. In FIG. 9C, when the frame displays green, the driving polarity of the panel is dot inversion. The dot inversion source driver hardly makes each single color frame to be dot inversion and thereby cause crosstalk.